Digital qam modulator using post filtering carrier...

Details Digital qam modulator using post filtering carrier... Digital qam modulator using post filtering carrier...

H - Electricity

04

L

H04L 27/36 (2006.01) H04N 7/04 (2006.01) H04N 7/10 (2006.01)

Patent

CA 2263244

The quadrature amplitude modulator of the present invention allows from 6 to 8 independent compressed channels to occupy a 6 MHz bandwidth while reducing processing power by 33 percent for 8 levels of modulation offered by 64-QAM and by 25 percent for 16 levels of modulation offered by 256-QAM. The QAM modulator is implemented with a reduction in the total number of binary parallel multipliers and the use of LUTs (look-up tables) storing precomputed filter weighting coefficients thereby increasing operational throughput. The reduction in multipliers is achieved by using post filtering carrier combination which similarly reduces the number of MAC (multiply and accumulate) operations performed during filtering. The invention can be implemented as an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).

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