G - Physics – 06 – F
Patent
G - Physics
06
F
354/47, 354/230.
G06F 13/28 (2006.01) G06F 15/78 (2006.01)
Patent
CA 1297195
ABSTRACT OF THE DISCLOSURE A digital signal processor comprises a bus structure including a program bus, data bus and data input/output bus, a program memory, a program controller, an internal data memory made up of a plurality of 2-port memories for storing block data, an arithmetic operator, a DMA controller for implementing block data input/output between the internal data memory and external data memory in parallel to an internal operation by the arithmetic operator, an address generator for generating addresses for the internal operation and DMA transfer concurrently and in parallel to the internal operation, and parallel data input/output ports for implementing parallel data communication with an external device independently of input/output operations and in asynchronous fashion. The processor executes an intricate adaptive process algorism such as image signal processing at high speed and at high throughput.
560636
Kameyama Masatoshi
Kamizawa Koh
Murakami Tokumichi
Kirby Eades Gale Baker
Mitsubishi Denki Kabushiki Kaisha
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