Digital signal processor implementation of high impedance...

H - Electricity – 02 – H

Patent

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H02H 1/00 (2006.01)

Patent

CA 2558860

A digital signal processor implementation of three algorithms used to detect high impedance faults. The algorithms can be wavelet based, higher order statistics based and neural network based. The algorithms are modified to process one second of data instead of ten seconds of data and a double buffered acquisition is connected to the output of the algorithms.

La présente invention concerne l'implantation par un processeur de signal numérique de trois algorithmes utilisés pour détecter des erreurs d'impédance élevée. Ces algorithmes peuvent être fondés sur une ondelette, des statistiques d'ordre élevé ou un réseau neuronal. Ces algorithmes sont modifiés de façon à traiter une seconde de données au lieu de dispositif secondes de données et une acquisition à double tampon est connectée à la sortie de ces algorithmes.

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