H - Electricity – 04 – N
Patent
H - Electricity
04
N
H04N 7/26 (2006.01) H03M 13/03 (2006.01) H04N 7/66 (2006.01)
Patent
CA 2559606
A pre-processor pre-processes enhanced data packets by coding the enhanced data packets for forward error correction (FEC) and expanding the FEC-coded data packets. A data formatter adds first null data into first place holders within each pre-processed enhanced data packet. A first multiplexer multiplexes the main data packets with the enhanced data packets having the first null data. A holder inserter inserts second null data into second place holders within an enhanced data packet outputted from the first multiplexer. A data interleaver replaces the second null data with parity data. A data generator generates at least one known data sequence. A symbol processor replaces the first null data included in an output of the data interleaver with the known data sequence(s). A non-systematic RS encoder generates the parity data by performing non-systematic RS-coding on an output of the symbol processor, and provides the parity data to the data interleaver.
Choi In Hwan
Hong Sung Ryong
Hong Young Jin
Kang Kyung Won
Kwak Kook Yeon
Lg Electronics Inc.
Smart & Biggar
LandOfFree
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