Direct instructions rendering emulation computer technique

Details Direct instructions rendering emulation computer technique Direct instructions rendering emulation computer technique

G - Physics

06

F

G06F 9/455 (2006.01)

Patent

CA 2455479

A method and system for emulating instructions of legacy microprocessors which execute a compiled high-ordered language, such as C/Ct-r, in which the compiled code is structured such that data and instructions segments are segregated. In order to improve the real-time performance of the system, legacy instructions are directly mapped to equivalent instructions of the host processor where possible. Additional techniques may optionally be employed to further increase the real-time performance of the system. By utilizing the direct mapping of the legacy instructions to host instructions, the emulation system in accordance with the present invention provides increased real-time performance for relatively modern RISC microprocessors.

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