Direct memory access refresh system

G - Physics – 06 – F

Patent

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Details

354/241, 314/7

G06F 9/00 (2006.01) B41J 2/06 (2006.01) B41J 2/385 (2006.01) G01D 15/06 (2006.01) G03G 13/00 (2006.01) G03G 13/26 (2006.01) G03G 15/00 (2006.01) G05B 19/05 (2006.01) G06F 12/00 (2006.01) G06F 13/00 (2006.01) G06F 13/12 (2006.01) G06F 13/28 (2006.01) G11C 7/00 (2006.01) G11C 8/00 (2006.01) G11C 15/00 (2006.01) G11C 17/00 (2006.01) G11C 19/00 (2006.01) G11C 21/00 (2006.01) G11C 27/00 (2006.01)

Patent

CA 1100645

ABSTRACT OF THE DISCLOSURE Direct Memory Access Refresh System In a controller for a host machine such as an electrostatographic copier having a central processing unit module connected via a system bus to an input-output processing unit module, a direct memory access system functioning as part of the input-output processing unit module and operative to provide a high-speed means of refreshing and updating control registers in the host ma- chine by direct accessing of memory in the central process- ing unit module. The direct memory access system may be programmed to synchronously refresh-update the host ma- chine's control registers as in its normal mode and also asynchronously refresh-update the control registers as in the abnormal mode of a detected electrical disturbance in the electro-sensitive periphery surrounding the control registers, thus requiring restoring thereof. High-speed movement of data by the direct memory access system is achieved through dedicating a portion of random access memory in the central processing unit module for such access- ing, and transferring control of the system bus from the central processing unit module to the direct memory access system. This enables data accessed through a fixed se- quence of addresses from dedicated memory to be transferred directly to the host machine's control registers without incurring time constants that would otherwise be had if the data were to be manipulated by a central processor in the central processing unit module -1-

294599

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