Disaster recovery port in a portable computer

H - Electricity – 04 – L

Patent

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Details

H04L 1/22 (2006.01) H02H 3/05 (2006.01)

Patent

CA 2507315

Architecture for updating corrupted instructions in a computing device. The computing device includes a housing (500) for enclosing a flash memory (418) for storing a boot loader routine, and at least one boundary-scan device (508) internal to the computing device for processing the boot loader routine, and operatively disposed on a boundary-scan bus. The housing includes a boundary- scan port through which updated instructions are communicated and power provided. The port is concealed under a label, cover, or in a location that limits access by the device owner, such as the battery well.

Une architecture de mise à jour d'instructions corrompues dans un dispositif informatique. Ce dernier comporte un boîtier (500) permettant d'y insérer une mémoire flash (418) destinée à mémoriser une routine de chargeur d'amorce et au moins un périphérique de registre à décalage (508) inséré dans le dispositif informatique en vue du traitement de la routine de chargeur d'amorce que l'on place de manière opérationnelle sur un bus de registre à décalage périphérique. Le boîtier comporte un port de registre à décalage périphérique à travers lequel on communique des instructions mises à jour et on achemine l'électricité. Le port est dissimulé derrière une marque, un couvercle ou un emplacement limitant l'accès au propriétaire du dispositif, par exemple la cavité de réception de la batterie.

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