Disk array controller with parity capabilities

Details Disk array controller with parity capabilities Disk array controller with parity capabilities

G - Physics

06

F

354/234

G06F 13/18 (2006.01) G06F 3/06 (2006.01) G06F 11/10 (2006.01)

Patent

CA 2026769

Abstract of the Disclosure A disk array controller includes a local microprocessor, a bus master interface, a compatible interface, buffer memory and a disk interface. The controller includes a DMA controller between the microprocessor, the bus master interface, the compatibility interface and the buffer memory. DMA controllers are also provided between the disk interface and the buffer memory. One of these DMA channels includes an XOR engine used to develop parity information used with the disk array. The various DMA controllers are cycled to allow access to the buffer memory and the disk interface.

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