Distributed arbitration for multiple processors

G - Physics – 06 – F

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354/234

G06F 13/36 (2006.01) C23C 14/04 (2006.01) G06F 13/374 (2006.01) G06F 15/17 (2006.01)

Patent

CA 1217872

DISTRIBUTED ARBITRATION FOR MULTIPLE PROCESSORS Abstract A method of arbitrating for N processors request- ing access to a shared resource utilizing 2 log2N shared variables, such as electrical lines. Each processor can assert a line which is asserted if any processor is asserting it. A requesting processor asserts one of two lines for each bit of a unique processor address, the choice of line depending on the value of the bit. The processor then examines the non-asserted line to determine if it is asserted by another processor. If the other line is asserted, the requesting processor either releases its own asserted line or waits depending on the value of the address bit. Thus, priority is determined by the address values. Once a processor has successfully asserted lines for every bit of its address it is granted access. Arbitration with fairness can be obtained by di- viding processors into two fairness groups and assigning a turn to one of the groups. A proces- sor is allowed into arbitration if the turn belongs to its fairness group. Upon completing access, the processor is assigned to the other fairness group. The turn is changed when no processor of that fairness group is requesting access.

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