Distributed gain line driver amplifier

H - Electricity – 03 – F

Patent

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Details

H03F 1/32 (2006.01) H03F 1/02 (2006.01) H03F 3/68 (2006.01) H03F 3/72 (2006.01)

Patent

CA 2306227

A line driver amplifier is implemented by employing amplifier stages including a plurality of output transistors and a corresponding plurality of auxiliary amplifiers. The output transistor and auxiliary amplifier pairs are connected in parallel. Each of the auxiliary amplifiers includes a built in voltage offset, beginning with an auxiliary amplifier having the smallest voltage offset to the auxiliary amplifier having the largest offset. The individual auxiliary amplifiers maintain their corresponding output transistors in an OFF state so long as the overall amplifier input signal has a magnitude less than the auxiliary amplifier offset voltage level. When the input signal magnitude level is equal to or greater than the offset voltage level of an auxiliary amplifier, that auxiliary amplifier turns its corresponding output transistor to an ON state. Thus, for lower magnitude input signals fewer than all of the output transistors are in an ON state, while for maximum magnitude input signals all of the output transistors are in an ON state. Use of the auxiliary amplifier-output transistor pairs allows use of smaller size transistors, each of which has a lower output current than an equivalent single output transistor. Since all of the output transistors in each amplifier stage are connected in parallel, the amplifier output current is the sum of the currents passing through the ON output transistors. Consequently, the linearity of the overall amplifier structure is significantly improved in the frequency domain. In one embodiment of the invention the auxiliary amplifier offset voltage levels are fixed, while in another embodiment of the invention the offset voltage levels of the auxiliary amplifiers are adjustable, e.g., programmable.

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