Distributed memory architecture for a configurable logic...

Details Distributed memory architecture for a configurable logic... Distributed memory architecture for a configurable logic...

G - Physics

11

C

352/41.2

G11C 5/00 (2006.01) H03K 19/173 (2006.01)

Patent

CA 2022056

This invention provides additional circuitry for a configurable logic array having logic functions which are programmed by loading memory cells which cause the logic array to generate a desired function. With the additional circuitry, the memory cells can also be used as memory for access by other parts of the logic array during operation.

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