Dma operable in compliance with pointers, each including a...

Details Dma operable in compliance with pointers, each including a... Dma operable in compliance with pointers, each including a...

G - Physics

06

F

G06F 12/02 (2006.01) G06F 13/28 (2006.01)

Patent

CA 2128083

Comprising a data memory region for data and pointer memory sections for pointers controlling transfer of the data to or from an I/O device for a CPU, a memory for DMA comprises in each pointer memory section a one-bit memory area for a discrimination or skip bit (Bi) indicative of whether the transfer should proceed or be skipped at one of the data that is controlled by the pointer stored in the pointer memory section under consideration. Preferably, the discrimination bit represents binary zero and one values when the transfer should proceed and be skipped, respectively. It is preferred to form a DMA controller together with the memory in an LSI semiconductor device.

Comprenant une région de mémoire pour les données, et des sections de mémoire pour les pointeurs qui gèrent l'échange des données entre un périphériques d'E / S et un CPU, une mémoire DMA comporte dans chaque section de mémoire de pointeur une zone de mémoire de 1 bit contenant un bit de discrimination ou de saut (Bi) indiquant si le transfert doit être effectué ou non pour une des données gérées par le pointeur mémorisé dans la section de mémoire de pointeur considérée. De préférence, le bit de discrimination prend la valeur binaire 0 ou 1 lorsque le transfert doit être effectué ou non, respectivement. Il est utilisé pour constituer, avec la mémoire, un contrôleur DMA dans un dispositif à semiconducteur LSI.

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