Double polysilicon integrated circuit process

Details Double polysilicon integrated circuit process Double polysilicon integrated circuit process

H - Electricity

01

L

148/3.2, 148/3.5

H01L 21/266 (2006.01) H01L 21/308 (2006.01) H01L 21/335 (2006.01)

Patent

CA 1267825

DOUBLE POLYSILICON INTEGRATED CIRCUIT PROCESS Abstract of the Disclosure In d double polysilicon integrated circuit processing method a first level polysilicon is used for FET gate fabrication, a second level is used for interconnection and both levels are used in the fabrication of analog capacitors over field oxide regions. By the invention, capacitors are also fabricated in the FET device well by . implanting dopant through She second level polysilicon at the same time that dopant is implanted directly into other regions of the substrate to a greater depth and dopant level concentration so as to function as an FET source. The method is particularly adapted to fabricating DRAM memories.

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