Double unequal bus timeout

Details Double unequal bus timeout Double unequal bus timeout

G - Physics

06

F

354/233

G06F 13/36 (2006.01)

Patent

CA 1321842

ABSTRACT OF THE DISCLOSURE A method and arrangement for preventing the locking out of devices which are coupled to a bus by either of two of the devices which have become initiator and target devices respectively. The devices arbitrate for control of the bus after the bus enters a bus free phase. The device which wins the arbitration becomes an initiator. A timer in each device on the bus is started upon the initiation of the arbitration. The initiator device is removed from the bus when an elapsed time after the timers have been started reaches a pre-determined value. The distributed clock of the invention ensures that the devices coupled to the bus will clear the bus after the initiator has been on the bus for a pre-determined time, thereby obviating skew problems associated with single clocked systems.

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