H - Electricity – 03 – K
Patent
H - Electricity
03
K
H03K 19/0185 (2006.01) H03K 19/00 (2006.01) H03K 19/017 (2006.01)
Patent
CA 2043610
In a driving circuit supplied with an input signal having one of logic one and zero levels and producing an output signal through an output terminal to drive a load circuit connected to the output terminal, a first MOS transistor (26) is put into a first source-drain conductive state to produce a predetermined positive voltage (VDD) as the output signal when the input signal has the logic one level. The first MOS transistor has a first channel between its source and drain terminals. A second MOS transistor (27) is put into a second source-drain conductive state to produce a ground potential as the output signal when the input signal has the logic zero level. The second MOS transistor has a second channel between its source and drain terminals. Each of the first and the second channels has a restricted channel width to restrict source-drain currents flowing through the first and the second channels. A subsidiary drive circuit (30) drives the load circuit during transition time interval each time when the input signal changes from one of the logic one and zero levels to another of the logic one and zero levels.
Corporation Nec
Smart & Biggar
LandOfFree
Drive circuit comprising a subsidiary drive circuit does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Drive circuit comprising a subsidiary drive circuit, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Drive circuit comprising a subsidiary drive circuit will most certainly appreciate the feedback.
Profile ID: LFCA-PAI-O-1396175