Driver circuit for a three-state gate array using low...

H - Electricity – 03 – K

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328/130, 328/95

H03K 19/013 (2006.01) H03K 19/082 (2006.01)

Patent

CA 1244098

ABSTRACT A driver circuit for simultaneously setting up a plurality of output buffers of a 3-state gate array into and out of a floating state using low control current. A buffer driver tran- sistor is provided for each output buffer with the primary con- trol path of that transistor introducing a control circuit to the respected output buffer. A common driver transistor has a pri- mary current path which provides a control signal to the control electrodes of a plurality of buffer driver transistors. Clamp means are provided for discharging the conductor means to ground upon turn-off of the common driver transistor. Clamp means pre- ferably includes a clamp transistor having a primary current path coupled between the conductor means and ground and having a dif- ferentiator coupled to the common driver transistor for detecting the leading edge of turn-off of that transistor and in response thereto momentarily, dynamically turning on the clamp transistor to couple the conductor means to ground and thereby discharge any effective capacitance of the conductor means to ground.

481469

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