Dual domino cmos logic circuit, including complementary...

H - Electricity – 03 – K

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H03K 19/096 (2006.01) H03K 19/21 (2006.01)

Patent

CA 1257344

DUAL DOMINO CMOS LOGIC CIRCUIT, INCLUDING COMPLEMENTARY VECTORIZATION AND INTEGRATION Abstract At each stage of a domino CMOS logic circuit, the output signal S and its inversion S are separately generated in mutually complementary first and second logic networks. These outputs S and ? are then used as inputs for succeeding domino logic stages. In this way, both S and ? are guaranteed to be low at the end of the precharging phase as is desired for inputs to all domino logic.

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