Dual hardware channels and hardware context switching in a...

Details Dual hardware channels and hardware context switching in a... Dual hardware channels and hardware context switching in a...

G - Physics

06

T

G06T 11/20 (2006.01) G06F 3/14 (2006.01) G06F 9/46 (2006.01) G06F 9/48 (2006.01)

Patent

CA 2050658

An improved graphics processor (10) has rapid response to higher priority tasks. It is implemented with multiple channels of FIFO input circuits (60, 62 and 61, 63) and with task interrupt and context switching capability. The graphics processor (10) servicing a first channel task is interrupted when a higher priority task is available in a second channel. Context switching facilitates interrupting of the lower priority first channel task, then saving of the context of the first channel task, then performing high- er priority second channel task, then restoring the interrupted first channel task, and then continuing with the processing of the restored first channel task. It is also imple- mented with concurrent downloading from a host computer (14) and processing by the graphics processor (10) and implemented with general purpose graphics processingcapability, including multi-level nested interrupts and nested subroutines.

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