Dual mode timer-counter

G - Physics – 04 – G

Patent

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G04G 3/00 (2006.01) G04G 15/00 (2006.01)

Patent

CA 2137510

A progammable timer circuit includes a progammable timer counter. The progammable timer counter receives a count and counts until that count is reached in response to clock signal. A progammable microprocessor is provided for generating count data and mode data in response to its programming. An input register receives the count from the microprocessor over the system bus. A control register is provided for receiving mode data and generating a mode select signal representative to the program selected mode of one-shot or continuous. A gate is provided for gating timing data in the timer counter from the input register on a one-shot basis when the mode select signal is in one-shot mode and repeat gating timing data in the timer counter from the input register when said mode select signal is in a second or continuous state when the timer counter reaches the count. A clock signal to said timer counter is provided until the timer counter reaches the count when said mode select signal is in a first or one-shot state, and for re-enabling the gate each time the timer counter reaches the count and continuously providing a clock signal when the mode select signal is in a second or continuous state.

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