Dual path bus structure for computer interconnection

Details Dual path bus structure for computer interconnection Dual path bus structure for computer interconnection

G - Physics

06

F

354/222

G06F 11/22 (2006.01) G06F 11/20 (2006.01) G06F 13/36 (2006.01) G06F 13/40 (2006.01)

Patent

CA 1185375

Abstract of the Disclosure A bus structure for use in a computer network requiring high availabilty and reliability of communications. Multiple bus paths are provided. When a transmission is to be made, under most circumstances the path is selected at random, with all paths being equally probable. Thus, failure of a path is detected quickly. Each host device in the network connects to the bus paths through an interface, or port. The task of path selection is carried out by the ports, independently of the host devices. The ports also detect path failures and automatically switch over to an alternate good path upon detection of such a failure, all without host involvement. Virtual circuit communications between hosts are transparent to path selection and switching, so the only indication to a host device of a path failure is a decrease in throughput. Most of the signal processing apparatus of each port is shared by the paths, only one path being supported at any given time. Thus, the addition of a second bus path involves only minimal cost.

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