Dual port video memory system having semi-synchronous data...

G - Physics – 11 – C

Patent

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Details

352/18, 354/231,

G11C 7/00 (2006.01) G06F 12/00 (2006.01) G11C 7/10 (2006.01) G11C 7/22 (2006.01) G11C 8/16 (2006.01)

Patent

CA 1267971

Abstract of the Disclosure A dual port video memory system includes a serial-to-parallel converter coupled to the input data port and a parallel-to-serial converter coupled to the output data port. Four-bit pixel values are clocked into the serial-to-parallel converter synchronous with an input clock signal and are provided by the parallel-to-serial converter synchronous with an output clock signal. The input and output clock signals may have different frequencies, but the negative-going edges of each of these clock signals are synchronized to the negative-going edges of a master clock signal.

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