G - Physics – 06 – F
Patent
G - Physics
06
F
354/227, 354/230
G06F 11/16 (2006.01) G06F 9/445 (2006.01) G06F 15/16 (2006.01) G06F 11/00 (2006.01) G06F 11/08 (2006.01) G06F 11/10 (2006.01) G06F 11/14 (2006.01) G06F 11/22 (2006.01) G06F 11/267 (2006.01)
Patent
CA 1320276
ABSTRACT A dual processor data processing system having inter- processor error checking includes a first central processing unit executing a series of instructions. A second central processing unit executes the same series of instructions independently of and in synchronism with the first central processing unit for receiving data to be input to the first central processing unit and a second data bus is coupled to the second central processing unit for receiving data to be input to the second central pro- cessing unit. Error checking devices are coupled to the first and second data busses for checking data transmitted over the first and second data busses and for detecting errors on I/O reads prior to delivery of the data to the first and second cen- tral processing units. The error checking devices include com- parison means for indicating an error when the data on the first and second data busses are unequal. Error isolation devices are responsive to an error detected from the error checking means for analyzing the cause of error while maintaining system synchroni- zation.
576418
Bissett Thomas D.
Bruckert William F.
Digital Equipment Corporation
Smart & Biggar
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