Dynamic buffer circuit

Details Dynamic buffer circuit Dynamic buffer circuit

G - Physics

11

C

352/82.3

G11C 11/40 (2006.01) G11C 11/404 (2006.01) G11C 11/405 (2006.01) G11C 11/4093 (2006.01) H03K 5/02 (2006.01)

Patent

CA 1047164

DYNAMIC BUFFER CIRCUIT Abstract of the Disclosure An input data buffer circuit, which includes six field effect transistors, is utilized in combination with a dynamic memory in order to widen the operating margins of the memory system. The buffer circuit is fabricated on the same integrated circuit chip as the memory, so that the electrical characteristics of the transistors of the buffer circuit and of the memory will be essentially identical. The levels of the output signals of the buffer circuit are relatively independent of random variations in levels of input signals because the levels of the output signals are primarily a function of the magnitude of the common power supply used by the buffer circuit and the memory, the electrical characteristics of the transistors of the buffer circuit and the memory, and the internal and external signals utilized by the memory.

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