Dynamic precharge circuitry

Details Dynamic precharge circuitry Dynamic precharge circuitry

G - Physics

11

C

352/82.1

G11C 11/40 (2006.01) G11C 11/408 (2006.01) G11C 11/56 (2006.01)

Patent

CA 1115843

DYNAMIC PRECHARGE CIRCUITRY Abstract of the Disclosure In MOS circuitry, such as a dynamic MOS random access memory, precharge circuitry, consisting of six p-channel MOS transistors and a seventh p-channel MOS transistor connected as a capacitor, facilitates a two step charging process that initially lowers the potential of a first circuit node from a high potential to a value approximately one threshold voltage above an available low level power supply potential and then further lowers the potential of the circuit node to a value below that of the available low level power supply potential. A single voltage pulse and the complement thereof are the only input signals required. Normal threshold voltage losses of MOS transistors can thus be effectively eliminated and noise margins thereby improved.

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