Dynamic self-checking safety circuit means

G - Physics – 06 – F

Patent

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Details

G06F 11/00 (2006.01) F23N 5/20 (2006.01) F23N 5/24 (2006.01) G05B 9/02 (2006.01) G06F 11/30 (2006.01)

Patent

CA 2164418

A safety circuit for monitoring computer hardware that can create an unsafe condition if a failure occurs. The circuit includes a microprocessor, a keyword decoder, and a dynamic safety relay drive circuit. The microprocessor runs a set of internal tests which create a keyword made up of a series of bits. A particular series of bits indicates the desired operation of the microprocessor. On alternate generations of the keyword one bit in the series is inverted. The keyword decoder receives the keywords and outputs a "true" signal if the keyword indicates the desired operation of the microprocessor, and "false" signal if the keyword indicates otherwise. The output of the keyword decoder is transmitted to the dynamic safety relay drive circuit, and this signal will keep the circuit energized as long as its alternating. The position of the bit which is inverted is rotated through the keyword so that different bit paths through the keyword decoder may be tested.

L'invention concerne un circuit de sécurité conçu pour contrôler un matériel informatique pouvant créer des conditions d'insécurité en cas de défaillance. Ledit circuit est doté d'un microprocesseur, d'un décodeur de mots-clés, et d'un circuit d'attaque de relais de sécurité dynamique. Le microprocesseur exécute un ensemble d'essais internes créant un mot-clé constitué d'une série de bits. Une série particulière de bits indique l'opération voulue du microprocesseur. Lors des générations alternées du mot-clé, un bit de la série est inversé. Le décodeur de mots-clés reçoit le mot de passe et sort un signal "vrai" si le mot de passe indique l'opération voulue du microprocesseur, et un signal "faux" si le mot-clé indique autre chose. Le signal de sortie du décodeur de mots-clés est transmis au circuit d'attaque de relais de sécurité dynamique, et ce signal maintient l'excitation du circuit tant qu'il est en alternance. La position du bit inversé subit une rotation à l'intérieur du mot-clé de sorte que différents trajets binaires dans le décodeur de mots-clés puissent être testés.

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