Dynamic semiconductor memory cell with random access (dram)...

Details Dynamic semiconductor memory cell with random access (dram)... Dynamic semiconductor memory cell with random access (dram)...

G - Physics

11

C

352/82.4

G11C 11/34 (2006.01) H01L 21/28 (2006.01) H01L 21/8242 (2006.01) H01L 23/532 (2006.01) H01L 27/108 (2006.01) H01L 29/92 (2006.01)

Patent

CA 1214271

ABSTRACT OF THE DISCLOSURE The invention relates to a dynamic semiconductor memory cell with random access (DRAM), in which a bit line and a storage capacitor electrode consist of a doped silicide of a metal of high melting point. The length of the transfer gate is defined by the spacing of the silicide on the bit line and on the silicide of the storage capacitor electrode. The invention relates also to a method for its fabrication. Due to the self-aligning (S/D) contact and through the use of the silicide a higher packing density and a very low- resistance bit line are made possible. The gate length does not depend on the adjustment accuracy as it is defined by the spacing of the silicide-bit line and silicide electrode.

446967

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