Dynamic sense-refresh detector amplifier

Details Dynamic sense-refresh detector amplifier Dynamic sense-refresh detector amplifier

G - Physics

11

C

352/82.4

G11C 11/24 (2006.01) G11C 11/404 (2006.01) G11C 11/4094 (2006.01) H03K 3/356 (2006.01)

Patent

CA 1114953

Abstract of the Disclosure A dynamic sense-refresh detector amplifier consists essentially of a cross coupled MOS transistor pair and two sets of load-refresh circuits which each include a capacitor and three MOS transistors. The load-refresh circuits eliminate the negative effect of threshold voltage losses on noise margin by allowing the memory cells from which information is read out and sensed to be refreshed to full 1 and 0 levels. A control terminal of a transistor of each load-refresh circuit is coupled to the transistor of cross coupled pair not associated with that load-refresh circuit. In addition, a voltage clamping transistor is used with each load device to further increase operating noise margins. The dynamic operation of the amplifier allows for relatively low power dissipation.

319710

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