Dynamically programmable bus arbiter with provisions for...

Details Dynamically programmable bus arbiter with provisions for... Dynamically programmable bus arbiter with provisions for...

G - Physics

06

F

G06F 13/30 (2006.01) G06F 13/364 (2006.01)

Patent

CA 2115731

An arbitration circuit that uses a unique history register that is combined with a value representing bus requests to index into a table. All possible combinations of history register requests are stored in the table along with a corresponding grant. A block of the table is selected by the history register, and then the request is used to index into the block to determine which request receives a grant. The grant is then shifted into the history register. Advantageously, more than one table may be stored in memory which can be selected by an arbiter controller.

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