Early-late synchronizer having reduced timing jitter

H - Electricity – 04 – B

Patent

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H04B 1/7073 (2011.01)

Patent

CA 2509189

A device for maintaining fine alignment between an incoming spread spectrum signal and a locally generated code in a digital communication receiver comprises: - a delay line (56) for storing a plurality of consecutive samples (E-1, E, M, L, L+1) of the incoming spread spectrum signal; - three digitally controlled interpolators (24, 26, 28) for determining by interpolation between consecutive samples an interpolated early sample (e), an interpolated middle sample (m) and an interpolated late sample (1); - two correlators (30, 32) for calculating an error signal (.xi.) as the difference between the energy of the symbols computed from the interpolated early (e) and late (1) samples; - a circuit for generating a control signal (SOUT) for controlling the interpolation phase of the digitally controlled interpolator (24) for the early sample (e), and - a digital non-linear filter (68), for smoothing the control signal (SOUT) of the interpolator (24) for the early sample (e), enabling the update operation of the control signal only when the absolute value (|.xi.(n)|) of the error signal at a time instant n is smaller than the absolute value (|.xi.(n-1)|) of the same error signal at a time instant n-1.

Un dispositif destiné à maintenir un alignement fin entre un signal à spectre étalé entrant et un code généré localement dans un récepteur de communication numérique comprend: - une ligne de retard (56) pour stocker une pluralité d'échantillons consécutifs (E-1, E, M, L, L+1) du signal à spectre étalé entrant; - trois interpolateurs commandés numériquement (24, 26, 28) destinés à déterminer l'interpolation entre les échantillons consécutifs, un échantillon interpolé précoce (e), un échantillon interpolé intermédiaire (m) et un échantillon interpolé tardif (1); - deux corrélateurs (30, 32) pour calculer le signal d'erreur (?) qui est la différence entre l'énergie des symboles calculés à partir des échantillons interpolés précoce (e) et tardif (1); - un circuit pour générer un signal de commande (S<SB>OUT</SB>) afin de commander la phase d'interpolation de l'interpolateur commandé numériquement (24) pour l'échantillon précoce (e); et - un filtre numérique non linéaire (68), destiné à lisser le signal de commande (S<SB>OUT</SB>) de l'interpolateur (24) pour l'échantillon précoce (e), qui permet de mettre à jour le fonctionnement du signal de commande uniquement lorsque la valeur absolue (|?<<;>n</;><|) du signal de commande à un moment du temps n est inférieure à la valeur absolue (|?<<;>n</;>-1<|) du même signal d'erreur à un moment du temps n-1.

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