Electronic postage meter having power up and power down...

G - Physics – 07 – B

Patent

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354/222, 354/34

G07B 17/02 (2006.01) G06F 1/28 (2006.01) G07B 17/00 (2006.01)

Patent

CA 1245768

AN ELECTRONIC POSTAGE METER HAVING POWER UP AND POWER DOWN PROTECTION CIRCUITRY ABSTRACT OF THE DISCLOSURE A method and apparatus for providing enhanced security to the non-volatile memory of an electronic postage meter during power up and power down of the meter is disclosed. The apparatus comprises means for detecting a regulated voltage level of the meter, means for detecting an unregulated voltage level of the meter, means for detecting a predetermined frequency from a system clock associated with the meter and a reset delay circuit responsive to the detected unregulated voltage, detected regulated voltage and the predetermined clock frequency for allowing access to the non-volatile memories if the unregulated voltage level, the regulated level and the clock frequency have reached their appropriate levels and preventing access to the memories otherwise. Through the use of this circuitry the critical accounting information within the memories is protected during the powering up and powering down of the postage meter.

503778

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