Encoder arrangement

Details Encoder arrangement Encoder arrangement

H - Electricity

03

M

H03M 7/00 (2006.01) H04L 12/56 (2006.01)

Patent

CA 2076818

- 15 - B. VOETEN - W. VERBIEST 2-7 ABSTRACT ENCODER ARRANGEMENT Encoder arrangement including the cascade connection of a data source (VSS), an encoder circuit (ENC) and a buffer circuit (BUFC) which is part of a preventive policing circuit (PPC) adapted to reduce the data output rate of said buffer circuit when said output rate does not satisfy a predetermined probability distribution function CCCP/CR) of said output rate . The PPC at the end of each measurement interval measures this data output rate, determins the interval (BRI) to which the measured data output rate belongs and generates an alarm signal (AL). Via a gating arrangement (AG. GC) the alarm signal controls the connection of a clock signal (CLO/3) with a reduced output rate to the read out input (RO) of the buffer circuit (BUFC) when for the measured interval the cell rate has to be decreased.

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