Encryption apparatus

H - Electricity – 04 – L

Patent

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Details

H04L 9/00 (2006.01) H04L 9/18 (2006.01)

Patent

CA 2055502

An encryption circuit that operates with substantially zero delay. Using programmable keys and polynomials, the encryp- tion algorithm can be constantly changed to thwart any unintended receiving parties from decoding the data. A key (101) and a polynomial (102) are loaded into registers. The key is then loaded into a shift register and shifted through XOR gates (106) at a programmable rate. The other input of the XOR gates comes from the result of ANDing (103) a disable signal, the polynomial register (102), and the last stage of the shift register (104). Eight bits of the shift register outputs are XOR'ed with the input data to be encrypted. The output of these XOR gates (105) is the encrypted data.

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