Encryption / decryption apparatus for a computer

Details Encryption / decryption apparatus for a computer Encryption / decryption apparatus for a computer

H - Electricity

03

M

354/67

H03M 7/00 (2006.01) G06F 12/14 (2006.01) G06F 21/00 (2006.01) H04L 9/06 (2006.01) G06F 1/00 (2006.01)

Patent

CA 2010700

A host computer add on encryption/decryption printed circuit board includes address and control buffers, data buffer and board decode logic having input and output terminals selectively connected to the host computer and to first ports of a dual port random access memory (DPR) for storing a block of data and addresses and inputting portions of the block of data and addresses into the DPR's memory. A central processing unit (CPU) is connected to second ports of the DPR, and to a CPU RAM, CPU ROM, real time clock, key image buffer, and DES encryption device. The CPU pursuant to commands of the host computer fetches: (1) the encryption/decryption key of the key image buffer and information from the DPR for encryption/decryption by the encryption/decryption device; (2) the name from the host computer and date, time and length of access time for accumulating an audit trail stored in the key image buffer and (3) file, auditor, and supervisor identification keys from key image buffer, and host computer for encryption and after comparison allowing access only to those files associated with these keys. In addition a system station key can be included for encryption and comparison for limiting user access only through an assigned station. A wait generator is connected to the CPU, real time clock and encryption/decryption device for clock synchronization of joint operations.

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