Enhanced asic process cell

G - Physics – 11 – C

Patent

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Details

G11C 11/401 (2006.01) G11C 11/404 (2006.01)

Patent

CA 2198839

A DRAM bit storage cell comprising a pair of capacitors each having one plate connected to a source or drain of a pass FET, another plate of a first of the pair of capacitors connected to a first voltage rail or a source of voltage boosted from the voltage of the first voltage rail, and another plate of a second of the pair of capacitors connected to a voltage rail opposite in polarity to the first voltage rail.

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