Enhancement mode limited mnos memory device

G - Physics – 11 – C

Patent

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352/82.3

G11C 11/40 (2006.01)

Patent

CA 1049654

ENHANCEMENT MODE LIMITED MNOS MEMORY DEVICE ABSTRACT OF THE DISCLOSURE A metal-nitride-oxide semiconductor device (MNOS) incorporating both a thin oxide region, intermediate source and drain regions and thick oxide regions which cover the source and drain regions. The thin oxide region provides for a variable threshold voltage while the thicker regions provide for a stable threshold voltage which protects the drain and source regions, increasing the breakdown voltage of the device. The structure limits operation of the device to the enhancement mode, making it particularly suitable for use in parallel memory arrays.

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