H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/181, 345/51
H01L 29/267 (2006.01) H01L 21/20 (2006.01) H01L 21/205 (2006.01) H01L 29/04 (2006.01) H01L 31/068 (2006.01) H01L 31/105 (2006.01) H01L 31/18 (2006.01) H01L 33/00 (2006.01)
Patent
CA 1292550
ABSTRACT OF THE DISCLOSURE A semiconductor wafer having an epitaxial GaAs layer, including a monocrystalline Si substrate having a major surface which is inclined at an off angle between 0.5° and 5° with respect to (100); and at least one intermediate layer epitaxially grown on the major surface of the monocrystalline Si substrate, as a buffer layer for accommodating a lattice mismatch between the Si substrate and the epitaxial GaAs layer which is epitaxially grown on a major surface of a top layer of the at least one intermediate layer. The at least one intermediate layer may comprise a GaP layer or one or more GaP/GaAsP, GaAsP/GaAs superlattice layers. The wafer may be used to produce a semiconductor light emitting element which has a plurality of crystalline GaAs layers including a light emitting layer epitaxially grown on the GaAs layer on the intermediate layer. The wafer may also be used to produce a compound semiconductor device such as amplifying and switching elements, light emitting and receiving elements and photovolataic elements. Methods for producing the semiconductor wafer, light emitting element and compound semiconductor devices are also disclosed.
517386
Sakai Shiro
Umeno Masayoshi
Yahagi Shinichiro
Borden Ladner Gervais Llp
Daido Tokushuko Kabushiki Kaisha
Nagoya Institute Of Technology
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