Erasure arrangement for an error correction decoder

Details Erasure arrangement for an error correction decoder Erasure arrangement for an error correction decoder

H - Electricity

03

M

325/35, 354/67

H03M 13/00 (2006.01) H03M 13/45 (2006.01) H04L 1/00 (2006.01)

Patent

CA 2013484

Abstract of the Disclosure In a decoder receiving error correction coded messages comprising forward error correction symbols including phase shift keyed type signals, each block of received symbols is processed to determine the energy of the component phase shift keyed type signals of each symbol and the average energy of the symbol. The component signal energy of the symbol is compared to a first prescribed threshold and symbols having energy values below the first threshold are marked.the average symbol energy is compared to a second prescribed threshold. Symbols having average energy below the prescribed second threshold are chosen and stored in order of increasing energy. Error positions are selected from the marked and chosen symbols in increasing energy order until a prescribed number is reached. - 18 -

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