Error detection circuitry for digital systems

G - Physics – 06 – F

Patent

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G06F 11/10 (2006.01) H04L 1/00 (2006.01) H04L 7/04 (2006.01)

Patent

CA 1203026

- 10 - Abstract Circuitry for detecting errors in a digital bit stream comprising a succession of data blocks and wherein each block incorporates a parity check. At an error monitoring location, a bistable device toggles in response to either a logical "1" or "0" in the bit stream. The output of the bistable device is sampled at a submultiple of the bit rate and compared with a predetermined criterion to detect bit errors.

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