G - Physics – 06 – F
Patent
G - Physics
06
F
354/224
G06F 11/00 (2006.01) G06F 11/10 (2006.01)
Patent
CA 1266528
Abstract of the disclosure ERROR DETECTION USING VARIABLE FIELD PARITY CHECKING A variable number of parity bits or error correction code per word is used to increase error detection for words having the extra parity bits in a control store. Since some words do not utilize all the architected space available for words, extra parity bits are generated at development time for such words and stored with the words. A decoder identifies the location and number of parity bits. Parity checking against the extra parity bits is then performed on different groups of bits in the word. This provides an inexpensive means of increasing error detection with minimal hardware cost.
532244
Petz Bruce Ralph
Rieger Richard Phillip
Walls Andrew Dale
International Business Machines Corporation
Saunders Raymond H.
LandOfFree
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