Error performance monitoring for digital transmission systems

H - Electricity – 04 – L

Patent

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340/74

H04L 1/00 (2006.01) H04L 1/24 (2006.01)

Patent

CA 1144617

ERROR PERFORMANCE MONITORING FOR DIGITAL TRANSMISSION SYSTEMS Abstract of the Disclosure A periodically reset flip-flop is set when an error is detected in the bit stream of a digital transmission link being monitored. A counter is incremented in response to each period during which the flip-flop is set and is decremented in response to a plurality of periods during each of which the flip-flop is not set. An alarm signal is produced if the count reaches a certain value. In the presence of the alarm signal, the number of error-free periods which must occur to decrement the counter is increased. The arrangement is less sensitive to error bursts causing false alarms than bit-error-rate monitoring arrangements. - i -

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