Etching process for fabricating integrated-circuit devices...

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H01L 21/31 (2006.01) H01L 21/027 (2006.01) H01L 21/311 (2006.01)

Patent

CA 1289682

ETCHING PROCESS FOR FABRICATING INTEGRATED-CIRCUIT DEVICES UTILIZING MULTIPLEVEL RESIST STRUCTURE AND EMPLOYING CARBON DIOXIDE PLASMA Abstract: This invention is a method of fabricating an integrated-circuit device by utilizing a multilevel structure that includes a planarizing layer. Reactive ion etching of the planarizing layer of a multilevel resist structure utilized to make integrated-circuit devices is carried out employing a plasma derived from carbon dioxide. The etching step is characterized by high throughput, good linewidth control, negligible radiation damage and low sensitivity to process parameter variations.

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