Etching process utilizing the same positive photoresist...

H - Electricity – 01 – L

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H01L 21/306 (2006.01) C23F 1/02 (2006.01) H01L 21/027 (2006.01) H01L 21/768 (2006.01)

Patent

CA 1095310

ABSTRACT OF THE DISCLOSURE In integrated circuit fabrication a method is provided involving the utilization of the same positive photoresist layer to form two different masks used in two separate etching steps. A positive photoresist layer is formed or a substrate, and portions of the positive photoresist layer are selectively exposed and developed to form the photoresist mask having a pattern of openings therethrough exposing the underlying substrate. Then, the substrate exposed in these openings is etched to form the pattern of recesses in the substrate corresponding to the openings. Next, portions of the remaining photoresist layer respec- tively adjacent to openings in the photoresist layer are exposed and developed to laterally exp?nd such open- ings, after which the substrate exposed in these expanded openings is etched whereby the portions of the recesses underlying the original openings are etched deeper than the portions of the recesses underlying the expaned portions of said openings. The result is a two-level recess pattern. In accordance with and important aspect of the disclosure, the substrate being etched is a layer of electrically insulative material formed over and integrated semiconductor circuit member, and the deeper portions of the recesses are etched completely through the insulative -1- layer to form holes which may be used for the passage of contacts to a semiconductor substrate where the insulative layer is directly on the substrate or as via holes when the insulative layer is formed between two layers of inte- grated circuit metallurgy -2-

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