H - Electricity – 04 – Q
Patent
H - Electricity
04
Q
344/14
H04Q 11/04 (2006.01) H04M 3/56 (2006.01)
Patent
CA 1227856
ABSTRACT A non-blocking exchange switch for communicating information samples between points, including a time slot interchange, a voice conferencing system and a network interchange. The time slot interchange includes an interchange memory having a single storage location associated with each point connected from the switch. A point address memory provides point addresses corresponding to points and associated interchange storage locations. A connection memory provides corresponding connection addresses corresponding to interchange storage locations associated with points with which a point is communicating. The voice conferencing system includes a conference memory means providing conference addresses corresponding to points in a conference connection, and a sample memory means for storing individual samples from corresponding points. A conference processor means provides corresponding conference samples to conference communicating points, each conference sample comprising a summation of individual samples. A clock defines successive sub-cycles, each sub-cycle having a write period and a read period. The point address memory is responsive to operation of the clock means to provide a point address during each sub-cycle. The interchange memory means is responsive to the clock during the write period of each sub-cycle to write a sample from a point corresponding to the point address and into the associated storage location. The interchange memory means is responsive during the read period of each sub-cycle to read a sample from the storage location corresponding to the connection address and to the point corresponding to the point address. In the voice conferencing system, the sample memory and conference processor may receive an individual sample from or to provide a conference sample to a corresponding point during the write period, and may perform operations to generate a conference sum for the corresponding point during the read period. In the network interchange, the time slot interchange is expanded by the addition of a network interchange. Each network interchange includes network memories corresponds to other exchange switches in the network. Each network memory further includes a single storage location for and associated with each point connected from the corresponding other switch. As information is written into a switch's interchange memory, the information is concurrently transmitted to and written into corresponding storage locations in the corresponding network memories of the other network interchanges. Each switch contains, in it's local network memories, copies of information currently stored in the interchange memories of all other switches. A point connected from a local switch and communicating with a remote point connected from a remote switch will read information transmitted by the remote point from the remote point's corresponding storage location in the local switch's network memory corresponding to the remote switch. Similarly, the remote point will read information transmitted by the local point from the storage location in the remote switch's own network interchange memories corresponding to the local switch. Node addresses are provided from a node address extension to the connection memory and identify local network memories corresponding to remove switches; connection addresses identify corresponding storage locations in network memories selected by node addresses.
465395
Intel Corporation
Riches Mckenzie & Herbert Llp
LandOfFree
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