External microcode operation in a multi-level microprocessor

Details External microcode operation in a multi-level microprocessor External microcode operation in a multi-level microprocessor

G - Physics

06

F

354/230.72

G06F 9/22 (2006.01) G06F 9/26 (2006.01)

Patent

CA 1167971

Abstract of the Invention A data processing system the central processing unit (CPU) of which is responsive to and executes microinstructions generated by the decoding of macro- instructions so as to provide one or more data processing operations. The sys- tem is arranged so that such microinstructions can be supplied to the CPU from a CPU-resident microcode decoding logic or from one or more external microcode decoding units. Each of the external units can identify a macroinstruction which it is capable of decoding and includes logic for externally providing one or more microinstructions which result from the decoding process. If an exter- nal microcode unit and the CPU-resident decode logic are both capable of such decoding operation. the external unit overrides the CPU decoding logic and con- trols the decoding operation externally. The external microcode unit includes logic for monitoring the number of microinstructions supplied to the CPU which have not yet been executed by the CPU.

395488

Affiliated with

Also associated with

Rating

External microcode operation in a multi-level microprocessor does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with External microcode operation in a multi-level microprocessor, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and External microcode operation in a multi-level microprocessor will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFCA-PAI-O-1171806