H - Electricity – 01 – L
Patent
H - Electricity
01
L
356/125
H01L 27/02 (2006.01) H01L 21/70 (2006.01) H01L 21/76 (2006.01) H01L 21/8249 (2006.01) H01L 27/06 (2006.01) H01L 27/07 (2006.01) H01L 29/04 (2006.01) H01L 29/10 (2006.01) H01L 29/72 (2006.01)
Patent
CA 1048656
FABRICATING HIGH PERFORMANCE INTEGRATED BIPOLAR AND COMPLEMENTARY FIELD EFFECT TRANSISTORS ABSTRACT A method for making dielectrically isolated bipolar and field effect transistors in the same substrate and a semiconductor integrated circuit so-made. The method consists of forming a first region of one conductivity type in a monocrystalline semiconductor substrate on a first type, forming second and third regions having different diffusion rates in the substrate, forming a monocrystalline layer of the other conductivity type, adding impurity to the second region, depositing a dielectric layer over the monocrystalline layer, forming openings in the dielectric layer over the first and third regions and another location in the monocrystalline layer, and depositing a layer of silicon over the dielectric layer and the openings. The impurities in the third region are outdiffused into the monocrystalline region over it to form the channel region of a Field Effect transistor. The regions of the layer of silicon are dielectrically isolated from one another and emitter and base regions of a bipolar transistor are selec- tively formed in the monocrystalline region over subcollector regions. Source and drain regions for a field effect transistor are formed over the third region and the another location to form both channel types of field effect transistors.
255057
Magdo Ingrid E.
Magdo Steven
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