Fabrication of a semiconductor device in a simulated...

Details Fabrication of a semiconductor device in a simulated... Fabrication of a semiconductor device in a simulated...

H - Electricity

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356/146, 356/147

H01L 21/385 (2006.01) H01L 21/225 (2006.01) H01L 21/265 (2006.01) H01L 21/477 (2006.01) H01L 29/78 (2006.01)

Patent

CA 1131797

ABSTRACT OF THE DISCLOSURE A simulated epitaxial layer is formed below the surface of the semiconductor body by implanting impurities, of a conductivity determining type opposite to the conductivity type of the body, into the body to a depth below the surface of the body less than the desired thickness of the simulated epitaxial layer. The body is then heated to a temperature above the diffusion temperature of the implanted impurity. The application of heat is terminated after the implanted impurity has diffused to a distance below the surface of the semiconductor body approximately equal to the desired thickness of the simulated epitaxial layer. Designated areas of the simulated epitaxial layer are doped to alter the conductivity thereof to form source and drain regions. An insulating layer is formed on the surface of the semiconductor body above the channel region. Metallized areas are formed over the source and drain regions and the insulating layer, respectively, to act as electrodes.

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