Fabrication of integrated circuits utilizing thick...

Details Fabrication of integrated circuits utilizing thick... Fabrication of integrated circuits utilizing thick...

H - Electricity

01

L

356/122, 95/94.4

H01L 21/312 (2006.01) G03F 7/09 (2006.01) H01L 21/027 (2006.01)

Patent

CA 1123118

FABRICATION OF INTEGRATED CIRCUITS UTILIZING THICK HIGH-RESOLUTION PATTERNS Abstract of the Disclosure The present invention relates to a method of processing surface portions of a structure in a high-resolution manner with good line width control. The method comprises utilizing a relatively thin uniform-thickness layer of material and establishing a pattern therein definitive of the pattern in accordance with which the surface of the structure is to be processed. The method includes the steps of interposing a relatively thick layer of material between the relatively thin layer and the surface of the structure, processing the relatively thick layer employing the relatively thin patterned layer as a mask to form in the relatively thick layer a pattern having near vertical walls and substantially no under- cutting. This pattern corresponds to the pattern of the relatively thin layer. The surface of the structure is then processed, utilizing the relatively thick patterned layer as a mask therefore.

334310

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