Fading circuit for video signals

H - Electricity – 04 – N

Patent

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350/53

H04N 5/262 (2006.01) G06T 3/40 (2006.01) H04N 5/265 (2006.01) H04N 5/44 (2006.01)

Patent

CA 1227277

ABSTRACT: The fading circuit comprises first and second video signal inputs (1,12) for receiving 8 bit parallel digitally encoded video signals and first and second fading control signal inputs (5,16) for receiving 8 bit parallel fading control signals. First and second multipliers (4,15) multiply the video signals by the fading control signals. The outputs of the multipliers (4,15) are truncated to 9 bits and fed to first and second inputs of an adding arrangement (11). A dither signal is fed from a dither signal generator (22) to the carry input (24) of the adding arrangement (11). The output of the adding arrangement (11) is fed to a ROM (28) which is programmed to add 1/256th of the output of the adding arrangement (11) to the output of the adding arrangement (11) and produce an 8 bit output which is applied to the output (31) of the fading circuit. By adding the dither signal amplitude transitions in the out- put signal at particular settings of the fading control signals are blurred and do not produce such a disturbing effect on the display screen.

480110

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