Fail-safe electronic time delay circuit

H - Electricity – 03 – K

Patent

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328/188, 321/32

H03K 5/13 (2006.01) B61L 3/00 (2006.01) H01H 47/18 (2006.01) H03K 17/28 (2006.01)

Patent

CA 1079821

FAIL-SAFE ELECTRONIC TIME DELAY CIRCUIT ABSTRACT OF THE DISCLOSURE This disclosure relates to a fail-safe time delay circuit for providing a definite time interval. The time delay circuit includes a resistance-capacitance charging network which is connected to a source of a d.c. supply source by a switching device. The potential charge developed on the capacitor powers an inverter to produce a.c. signals having a given frequency. The a.c. signal is fed to a multi-stage tuned amplifier having a resonant circuit tuned to the given frequency. The amplified a.c. signals are applied to a voltage doubling network which normally energizes a load and which maintains the load energized for no longer than the definite time interval after the opening of the switching device.

282270

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