Fault insertion

Details Fault insertion Fault insertion

G - Physics

01

R

G01R 31/3177 (2006.01) G01R 31/3185 (2006.01) G06F 11/267 (2006.01)

Patent

CA 2087448

An integrated circuit 11 12, 13, 14) having boundary-scan facilities in accordance with IEEE Standard 1149.1, has its boun- dary scan chain configured to permit fault insertion testing of di- agnostic and maintenance software. Each scan cell (39, 40, 45, 46) includes storage devices for storing a pair of bits of a binary vec- tor shifted into the boundary scan chain. One bit comprises faulty data and the other bit serves to control application of the faulty data by the scan cell. A system incorporating such integrated cir- cuits includes a controller (23) for controlling the IEEE test inter- face to shift the binary vector into the boundary scan chain, and diagnostic and maintenance software (21) for diagnosing the faults introduced into the integrated circuits.

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